CD4029 Block Diagram
Electronics tutorial

CD4029 Binary/Decade & UP/Down Counter

CD4029 is a Synchronous, Programmable, Presettable, 4 Bit Up/Down & Binary/Decade counter which is very much similar to the IC74193, However, there is one notable change between IC74193 and CD4029: CD4029 has one unique pin that determines its counter configuration for Binary and BCD counter mode, allowing the IC to count similarly to binary counter ICs such as 74163, 74193, and 74169, as well as BCD (Decade), counter ICs such as 74160, 74190, and 7490. It features a single terminal that controls the Up/Down counter mode. Find most basic detail on counter 

Feature of CD4029-:

  • 4-Bit presettable inputs pins.
  • Up/Down Binary counting & Up/Down BCD (Decade) counter.
  • Wide supply voltage range  3v to 15v.
  • Operating temperature range (-40 to +85)Degree Celsius
  • High noise immunity 0.45VDD (typically).
  • Low power TTL compatibility: fan out of 2 driving 74L or 1 driving 74LS.
  • Programmable Up/Down & Binary/Decade counter.

CD4029 Block Diagram-:

CD4029 Block Diagram
Block Diagram of CD4029

The table below contains short pin descriptions; detailed functional descriptions of each pin are provided in the following section, so continue reading the full article.

Pin Description
Clock input Clock signal input
Preset Enable (Active High) Used to Load the Data of A, B, C, & D input pins
Up/Down Toggle the Up & Down counter mode.
Binary/Decade Toggle the Binary & Decade counter mode.
Carry Out At its maximum and minimum count, it transitions from logic 1 to logic 0.
Carry-In Used in the cascading, Also enable IC for counting at logic 0
A,B,C, & D Preset Inputs(Parallel Data Inputs) or Jam Inputs/Signals
Qn Flip-Flop Outputs

CD4029 Technical Description of Pins-:

clock InputDiagrammatic representation of clock-signal-:
  • It is also known as clock pulse/clock signal, its continuous high-low signal which will use to trigger IC, that’s why it is also known as triggering pulse.
  • All 4 flip-flops are triggered with the same clock signal in this IC or any synchronous counter.
Active High preset input-:
  • This pin is most commonly used to load data from terminals A, B, C, and D(jam inputs).
  • This pin works asynchronously with the clock signal and loads data to the outputs irrespective of clock inputs
  • Logical 0 should be supplied to the preset enable input to count IC CD4029.
  • If logical 1 is applied to the preset enable input then whatever information available to its jam (A, B, C, D) inputs will be transferred to the outputs.
  • If count 5 (0101) is loaded to its preset (A, B, C, D) inputs and logic 0 is applied to the preset enable, the counting will be unaffected and the IC will continue to count on each positive edge of the clock.
  • If count 5 (0101) is loaded to its preset (A, B, C, D) inputs and logic 1 is applied to the preset enable, then the IC will not count with positive-Edge of the clock signal, it inhibits counting. And its loads asynchronously count 5 (0101) to the outputs (Qa, Qb, Qc, Qd) terminals, which means it’s completely independent of the clock signal.
What is meant by Asynchronous-;
  • The counting which is not synced with the positive edge of the clock signal is known as Asynchronous Counting, or in other words, you can say that the counter will not change its state according to the clock signal is known as an asynchronous counter.
  • IC CD4029 is also had asynchronous active high preset enable, Which will inhibit counting when this terminal will be supplied with a high value (logic 1).
  • It is completely independent of the clock signal.
  • If this terminal has logic 1 applied then it will load the data present at preset inputs (A, B, C, D) to the outputs, after each clock pulse.
Up/Down Terminal-:
  • This terminal is used to toggle counter mode as Up counting either Down counting.
  • Logic 1 should be applied for Up counting (The count will increment after each clock signal).
  • Logic 0 should be applied for Down counting (The count will decrement after each clock signal).
Binary/Decade Terminal-:
  • This terminal is used to toggle counter mode as Binary Counter either Down Counter.
  • Logic 1 should be applied for Binary Counting(in Binary Counter has 16 unique states i.e 0-15).
  • Logic 0 should be applied for Decade Counting(in Decade Counter has 10 unique states i.e 0-9).
Carry-Out -:
  • This is one of the ic’s identified pins as it goes from logic 1 to logic 0 at its maximum and minimum count.
  • Logic 0 at its maximum & minimum count is used as a triggering signal for cascaded IC.
  • For example, in binary/up counter mode CD4029, when reaches its maximum count 15 (i.e. 1111 at outputs terminals) then this pin will give logic 0 only for its maximum state. In a similar way, it transits from logic 1 to logic 0 in binary/down counter mode at its minimum count 0 (i.e. 0000 at outputs terminals)
  • Similarly, in BCD/up counter mode CD4029, when reaches its maximum count 9 (i.e. 1001 at outputs terminals) then this pin will give logic 0 only for its maximum state. In a similar way, it transits from logic 1 to logic 0 in binary/down counter mode at its minimum count 0 (i.e. 0000 at outputs terminals)
carry-In (Active low)-:
  • This is an input pin by default, and it should be connected to logic 0 to begin counting since it is an active low-featured pin. If it is connected to logic 1 then it will not trigger the IC CD4029 for counting.
  • In Cascading the Carry-Out pin and Carry-in pin play a vital role, as discussed above the carry-out pin provide continuously high logic until it reaches its maximum/minimum count. Carry-out is directly connected to the Carry-in of the next cascaded IC to trigger it for the next state. As carry-in is an active low input terminal once it will receive logic 0 it will start counting.
  • So in cascading the second IC receives the logic 0 at the maximum/minimum count of the previous IC and increments its counting by 1 and waits for the next maximum/minimum state of the previous IC.
  • For example, in cascading of 2 ICs when 1st IC reaches its maximum count 15(1111 in binary mode) then it will trigger 2nd IC by providing logic 0 through the carry-out, carry-in terminals

The logical waveform for Binary/Decade Mode is shown below to make you understand it better.

CD4029 Binary Mode Counting

 

 

 

 

 

 

 

 

 

 

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